Install the GNU ARM toolchain under Linux

Embedded development tools for a popular processor.

Summary: Many tools are available for programming various versions of ARM cores, but one particularly popular set is the GNU ARM toolchain. Learn more about embedded development using the ARM core, as well as how to install the GNU tools and begin using them.

Date: 20 May 2009
Level: Introductory
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If you are interested in embedded systems development on a widely used microprocessor, the Advanced RISC Machines (ARM) core fits the bill. This article provides a starting point for understanding the software side of embedded systems development by describing one set of commonly used tools: the GNU ARM toolchain.

The ARM family

Paramount among the concerns of embedded systems developers is how to get the most processing power from the least amount of electricity. The ARM processor family has one of the better designs for balancing processor power and battery power consumption.

The ARM core has gained technology advances through several versions over the last 20 years. Recent system on a chip (SoC) processors running on mobile phones such as the T-Mobile G1 Android combine dual-core (ARM9 and ARM11) processors to improve the performance of multimedia applications on low-powered platforms.

The more recent ARM cores support two operational states: ARM state, in which the core executes 32-bit, word-aligned instructions, and THUMB state, which executes 16-bit, halfword-aligned instructions. ARM mode provides the maximum power and addressing range capability of the processor, whereas THUMB mode allows portions of a program to be written in a very tight, memory-conserving way that keeps memory costs low. Switching between the modes is a trivial exercise, and for many algorithms, the size of the code required can be reduced significantly.

ARM processors improve performance by taking advantage of a modified Harvard architecture. In this architecture, the processor employs separate data and instruction caches, but they "feed" off of the same bus to access external memory. Furthermore, the instructions are put into a five-stage "pipeline" so that parallel processing occurs on the five most recent instructions loaded into the pipeline. In other words, each of the five separate actions (fetch, decode, ALU, memory, write) involving instructions occur in parallel. So long as the pipeline is flowing steadily, your code enjoys the speed advantages of parallelism, but the moment a branch occurs to code outside the pipeline, the whole pipeline must be reset, incurring a performance penalty. The moral is to be careful in designing your code so that you use branching only minimally.

A unique feature that the ARM architecture provides—forcing programmers to think in new and unique ways—is that every instruction can be optionally executed based on the current state of the system flags. This feature can eliminate the need for branching in some algorithms and thus keep the advantages of a pipeline-based instruction- and data-caching mechanism running at best performance (as branching can force the caches to be unnecessarily cleared).

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